I can understand the need to oversimplify explaining the difference between RAM and registers in an 800 word blog post. However, he spends an entire paragraph on something that’s not really a fundamental reason, and misses a couple of really fundamental reasons.
It’s true that register files are continuously powered and that DRAM is only powered on refreshes (and accesses), but that’s not one of the primary differences in power usage, and the power usage isn’t directly responsible for the speed difference. In fact, the reason CMOS logic is now dominant (as opposed to bipolar logic) is that it burns very little power when powered. SRAM is also continuously powered, but it’s much slower than a register file.
Besides distance, which is correctly given as a reason, the one paragraph explanation of the speed difference is that register files simply choose between fewer things, and selecting between more things takes much longer [1], and that register files are highly multi-ported (that is, they let you do many concurrent accesses), which is very expensive from an area standpoint (roughly, the area is proportional to the number of ports, which is probably larger than you think for register files, as a side effect of pipelining, OOO, and SMT).
[1] In some sense, it’s a constant time operation. But, it’s a linear time operation in RC (if you’re interconnect limited, which you will be for an SRAM in a modern process), and both resistance and capacitance grow as the register file / SRAM gets bigger.
I can understand the need to oversimplify explaining the difference between RAM and registers in an 800 word blog post. However, he spends an entire paragraph on something that’s not really a fundamental reason, and misses a couple of really fundamental reasons.
It’s true that register files are continuously powered and that DRAM is only powered on refreshes (and accesses), but that’s not one of the primary differences in power usage, and the power usage isn’t directly responsible for the speed difference. In fact, the reason CMOS logic is now dominant (as opposed to bipolar logic) is that it burns very little power when powered. SRAM is also continuously powered, but it’s much slower than a register file.
Besides distance, which is correctly given as a reason, the one paragraph explanation of the speed difference is that register files simply choose between fewer things, and selecting between more things takes much longer [1], and that register files are highly multi-ported (that is, they let you do many concurrent accesses), which is very expensive from an area standpoint (roughly, the area is proportional to the number of ports, which is probably larger than you think for register files, as a side effect of pipelining, OOO, and SMT).
[1] In some sense, it’s a constant time operation. But, it’s a linear time operation in RC (if you’re interconnect limited, which you will be for an SRAM in a modern process), and both resistance and capacitance grow as the register file / SRAM gets bigger.