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    Unlike the ESP32-C3, which is RISC-V based, the S3 still uses the Tensilica LX7 CPU.

    While the specs of both parts are different, having the C3 to dip their feet in the water with RISC-V will allow them to gauge interest.

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      I agree. Nevertheless, it’s an incremental change and I am looking forward to disclosure of more information regarding the extra vector instructions that are AI-related.

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        I wonder whether these instructions are specifically tuned for AI tasks, or if the marketing department is just slapping an “AI” label on regular vector instructions.

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          good one - I see a related trend around. Let’s see when they disclose more information.