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The rationale behind MyHDL - a Python-based HDL (hardware description language)

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    That’s pretty cool, but I disagree with this line.

    Test-driven hardware design? Never heard of.

    Maybe hardware designers don’t call it “test-driven development” but you can bet that professional hardware designers focus A LOT on using tests at all stages of development. It’s a lot less expensive to catch a bug in simulation than it is to catch it after burning it onto an FPGA (which can takes hours to days for large designs) or after the chip has already been taped out. Modern ASICs even have test circuitry built into the chip, so-called Built-in Self Test (BIST) circuits, so that you can more easily verify proper functioning after fabrication.

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      Well, usually there is a cultural barrier between software and hardware engineers, which tends to disappear among younger people, it’s a tendency … 95% of error check may be improved with this kind of approach, that’s for sure, now, take into account that sometimes, in fpga based daq systems, a design problem may only arise after hours of continuous data taking …