I envision, inside the CPU, the DAA instruction being called forth from its crypt by trumpets and groaning: “Many decades have I slept, yea since the era of the 80286! Who dares disturb my eternal rest?”
Many years ago, I read the Intel Architecture Manual. The instruction reference section starts with AAA. When I got to the end, I felt that this was an excellent example of good expectation management.
In the sizecoding scene, the BCD instructions (AAA, AAS, AAM, AAD, DAA and DAS) see quite a lot of use especially in the 8, 16 and 32 byte size categories. They’re some of the most versatile instructions when you only have one or two extra bytes to spare.
It doesn’t surprise me that it doesn’t work in x86-64 and I’m not sure how I feel about that. The article I linked to, “A Design Philosophy for Microcomputer Architectures,” is written by Dennis Allison where the code is mentioned.
No way to get a table lookup less than 6 bytes, on any architecture. And on some architectures, that could be considered a waste of memory (thinking 8-bit systems—my first computer only had 16K of RAM).
A BCD arithmetic instruction, huh.
I envision, inside the CPU, the DAA instruction being called forth from its crypt by trumpets and groaning: “Many decades have I slept, yea since the era of the 80286! Who dares disturb my eternal rest?”
Many years ago, I read the Intel Architecture Manual. The instruction reference section starts with AAA. When I got to the end, I felt that this was an excellent example of good expectation management.
Let me guess: AAA sets a handler that, on an exception, pulls the CPU out of a ditch and back to a safe state? [Sorry, US-specific joke]
ZZZ would of course enter sleep mode.
so there is enough space for a built in TLS and IRC instruction
In the sizecoding scene, the BCD instructions (AAA, AAS, AAM, AAD, DAA and DAS) see quite a lot of use especially in the 8, 16 and 32 byte size categories. They’re some of the most versatile instructions when you only have one or two extra bytes to spare.
For a nice example, see https://demozoo.org/productions/305431/
Several fun facts.
This doesn’t work in x86-64
That used to be called Allison’s algorithm. Dennis was also one of the founders of Dr Dobbs Journal.
It doesn’t surprise me that it doesn’t work in x86-64 and I’m not sure how I feel about that. The article I linked to, “A Design Philosophy for Microcomputer Architectures,” is written by Dennis Allison where the code is mentioned.
Yep, I saw the article, that is why I mentioned it.
I remembered one more thing. I think AMD used to have that code snippet in its older 32 bit optimization manual too.
aside from the obvious?—a lookup table
No way to get a table lookup less than 6 bytes, on any architecture. And on some architectures, that could be considered a waste of memory (thinking 8-bit systems—my first computer only had 16K of RAM).
There’s a shorter (5-bytes, not 8), also-branchless sequence that does the same:
Nice. But the sequence with
DAAwill work for the CPUs that have it (like the 8080, Z80, 6800 or 6809).daa did nothing to deserve this!