https://www.megaprocessor.com/ displayed at the Cambridge Computer History Museum is somewhat similar (built out of discrete elements), although 16-bit and not RISC-V.
A similar project was posted a couple years ago, which tried to simplify RISC-V enough to implement almost all of the 32-bit instructions by doing one serial bit at a time, though I think it was using FPGA: https://lobste.rs/s/nqxfoc/serv_is_award_winning_bit_serial_risc_v – several good videos too.
I love the idea of this! Looks like there’s been no visible activity since 2021, sadly. Does anyone know of more recent/active efforts in this space?
https://www.megaprocessor.com/ displayed at the Cambridge Computer History Museum is somewhat similar (built out of discrete elements), although 16-bit and not RISC-V.
A similar project was posted a couple years ago, which tried to simplify RISC-V enough to implement almost all of the 32-bit instructions by doing one serial bit at a time, though I think it was using FPGA: https://lobste.rs/s/nqxfoc/serv_is_award_winning_bit_serial_risc_v – several good videos too.
A friend of mine built a working 6502 out of discrete logic back in the late 90’s. This sort of thing is just incredible to me.
Well, then check this out!
https://monster6502.com/