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    Here’s the academic paper, which has much more technical detail than this press release: I See Dead µops: Leaking Secrets via Intel/AMD Micro-Op Caches (PDF)

    That paper was hard to find details about – searching for its title brought up only copies of the press release on various news sites. I found the link to the above PDF on https://www.cs.virginia.edu/venkat/.

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      Thank you. I couldn’t find the actual paper when I posted this link and at the time seemed like the most direct link to post.

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      My gut feeling is that we’re going to have to redesign hardware from the metal-up in order to prevent the panoply of various attacks we’re continuing to see. It also tells me that this is completely impractical and not going to happen.

      It’s going to be interesting to see how the larger story plays out over the next couple of decades or so.

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          Short summary by Jon Masters

          Summary is you need to either be same context, on a vulnerable SMT core, or cross-domain within a core where you don’t flush the uop cache. Quick hack is to flush the uop cache when crossing address space (e.g. user->kernel). Arch visible way today on x86 is iTLB invalidation.

          Source: https://twitter.com/jonmasters/status/1388564498986979328

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            this is spam? someone explain please

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              I wouldn’t call this spam, but I would guess the flagger might have been turned off by the page’s advertisements of the university that made the discovery and by the huge images of the authors that crowd out the interesting technical details. They may have also been annoyed that the page named the paper but did not link to it; hopefully the link in my other comment will help with that.