“Hm, this isn’t quite what I expected. The proposed VM is very simple, however, the explanation is nice. A great introductory article for college students trying to implement a VM/instruction parser.”
Then I scroll to the bottom:
“Hi! I’m Felix, a 17 year old programmer from London […]”
Holy crap! I was solving those kind of exercises in college, and I wouldn’t have been able to write an article as well-thought and informative as OP.
Every instruction set I have seen ( or implemented) has some variant of “load address” and “store address” (or can explicitly make the address a parameter of the instruction).
What if we push the whole business of memory management off the programmer and compiler and on to the virtual machine?
Here Mr CPU is a value object, store it for me.
No don’t tell me where, I don’t care.
Just give me a unique id, a unique hash, a unique word sized “name” that allows me to retrieve it based on value.
So when I want it back (to use in some other operation), I just asked for that value by name…
Sounds outrageously beyond what a real CPU could do? Maybe.
Except no real CPU does a load directly from ram anyway.
It looks up in an associative cache for that memory location… (a very crude hash table) and if it isn’t there… locks up until a whole cache line of words is read from ram into cache… and then loads that value into the register.
So all I’m asking is a combination of OS and hardware assist to create unique id’s and retrieve objects based on the objects value rather than storage location, and to garbage collect unused ones.
I’m still playing around in my head how to use this idea….
The cute thing is this….
Yes, I’m sure as a “VM plus Garbage Collector implemented in C”, it would be disastrously slow. But with some of the tasks farmed off to an FPGA…. it could be quite competitive and create a novel CPU architecture.
Scrolling through the post, I think to myself:
“Hm, this isn’t quite what I expected. The proposed VM is very simple, however, the explanation is nice. A great introductory article for college students trying to implement a VM/instruction parser.”
Then I scroll to the bottom:
“Hi! I’m Felix, a 17 year old programmer from London […]”
Holy crap! I was solving those kind of exercises in college, and I wouldn’t have been able to write an article as well-thought and informative as OP.
IKR! I just read that and was completely shocked.
This reminded me of my own experience building a VM. Good times!
I playing with a related idea.
Sort of.
Every instruction set I have seen ( or implemented) has some variant of “load address” and “store address” (or can explicitly make the address a parameter of the instruction).
What if we push the whole business of memory management off the programmer and compiler and on to the virtual machine?
Here Mr CPU is a value object, store it for me.
No don’t tell me where, I don’t care.
Just give me a unique id, a unique hash, a unique word sized “name” that allows me to retrieve it based on value.
So when I want it back (to use in some other operation), I just asked for that value by name…
Sounds outrageously beyond what a real CPU could do? Maybe.
Except no real CPU does a load directly from ram anyway.
It looks up in an associative cache for that memory location… (a very crude hash table) and if it isn’t there… locks up until a whole cache line of words is read from ram into cache… and then loads that value into the register.
So all I’m asking is a combination of OS and hardware assist to create unique id’s and retrieve objects based on the objects value rather than storage location, and to garbage collect unused ones.
I’m still playing around in my head how to use this idea….
The cute thing is this….
Yes, I’m sure as a “VM plus Garbage Collector implemented in C”, it would be disastrously slow. But with some of the tasks farmed off to an FPGA…. it could be quite competitive and create a novel CPU architecture.