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    I’d have expected a bigger performance difference between a 14nm and 5nm chip. The performance boost from the process should be on par with the difference between Kaby Lake and 2008-ish Nehalem chips.

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      You can’t really compare process nodes of different companies directly like that, to be fair. From what I remember, What intel refers to as 14nm is roughly equivalent to TSMC’s 10nm. To use years as an arbitrary measurement, I think it’s more like a 2-3 year performance improvement rather than an 8 year one (Kaby Lake vs Nehalem), which is still impressive in itself, without even accounting for TDP and other differences in thermal performance.

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        It’s true, the comparison is extremely rough. I had really expected the difference to be greater though.

        I’m really looking forward to seeing what how AMD and Apple designs on the same TSMC process compare.

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          I’m really looking forward to seeing what how AMD and Apple designs on the same TSMC process compare.

          The same here. I was planning on building a new desktop this year, but when I saw Apple’s lineup, I picked up a 16GB MBA instead as an upgrade from my Thinkpad(s) (I have other reasons for picking up a MacBook, mostly related to some hobbyist reverse engineering work, but the M1 sold me on it). I’m really impressed so far, especially when it comes to Rosetta. I’m curious as to its implementation details though; Intel apps and Arm64 apps have different page sizes on macOS, so it seems like there might be opportunities for exploitable bugs there, especially as Intel code doesn’t have the same pointer authentication security measures that Arm64 does.

          I’m going to hold off on building a new desktop until I see what AMD have to offer, because I’d love to use *BSD/Linux on hardware that performs like this.

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            My ThinkPad X1 Carbon is from 2017 and it’s mostly fine but the latest generation of AMD laptop chips are tempting me. I’ll see what Lenovo announces next year but an AMD T14/T14s looks like it’s in my future unless they announce something in the X series with a nice AMD CPU that can go beyond 16G of RAM.

            I’ve tried using macOS as my primary computer at various points over the years but I find it really hard to use for the stuff I want to do with it. The window management is inflexible, the package management is basically non-existent - and I like installing and uninstalling a lot of random shit, the UNIX userspace is stuck in a time warp. I know it works well for lots of people but it mostly drives me up the fucking wall. I’ve also tried using Apple hardware with Linux in the past and it wasn’t great. I’m used to three mouse buttons and the software I use is used to three mouse buttons.

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      Maybe just adding wider SIMD instructions isn’t the way to go? That what Intel has been going for years, but for algorithms like search/compression or graph data structures the wider you go the harder it is to use such instructions effectively. And on the other hand for embarrassingly parallel/wide data GPUs completely outclass CPUs.

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        Someone at AMD used to think the same, and decided to only put 128-bit units into Zen 1. But this changed with Zen 2. Can’t win 3d rendering benchmarks with only 128-bit? :D

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        The Intel processor has nifty 256-bit SIMD instructions. The Apple chip has nothing of the sort as part of its main CPU.

        This is news to me, is SIMD an x86-only thing or is it just not present in the current ARM spec?

        Evidently, the binaries will differ since one is an ARM binary and the other is a x64 binary

        This isn’t really surprising. I remember reading somewhere EVERY ARM instruction is the same width whereas x86 is all over the map and that is one of the reason these chips are so fast. It’s amazing to me that having 8 instead of 4 decoders can make such a difference.

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          This is news to me, is SIMD an x86-only thing or is it just not present in the current ARM spec?

          ARM has SIMD in the form of Neon and SVE. Neon is commonly implemented, but only goes up to 128-bits. SVE is a more recent variable-length SIMD extension that works with vectors between 128 and 2048-bits, with the max-width being implementation dependent.

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            Oh ok, so the author was more implying that Intel has 256/512 bit SIMD whereas the most common ARM implementation (Neon) only has up to 128 bits.

            Thank you for explaining!

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            having 8 instead of 4 decoders can make such a difference

            It’s far from the only difference though. Everything is huge in Apple’s uarch. Everything. Massive reorder buffer, massive L1 cache, and so on.