I told them it wouldn’t work. This kind of problen needs to be solved at hardware level by analog engineers keenly aware of failure modes and mitigations. Either the manufacturers or a RAM startup that focuses on secure, ECC RAM. Im not sure what odds of success are for that, though.
I was disappointed to read their conclusion that none of the current software or hardware mitigations amount to a perfect Rowhammer defense. Existing ECC modules are only protected from single-bit attacks. It does seem as though we need a more sophisticated ECC.
And/or just eliminate untrusted software implemented in complex ways on machines. I mean, your idea might get more traction but I’m not sure I’d ever trust it. ;)
I told them it wouldn’t work. This kind of problen needs to be solved at hardware level by analog engineers keenly aware of failure modes and mitigations. Either the manufacturers or a RAM startup that focuses on secure, ECC RAM. Im not sure what odds of success are for that, though.
I was disappointed to read their conclusion that none of the current software or hardware mitigations amount to a perfect Rowhammer defense. Existing ECC modules are only protected from single-bit attacks. It does seem as though we need a more sophisticated ECC.
And/or just eliminate untrusted software implemented in complex ways on machines. I mean, your idea might get more traction but I’m not sure I’d ever trust it. ;)
It’s seemingly becoming more and more popular to hide malicious payloads in SGX enclaves.