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    It’s interesting how the declarative style of OCaml fits in well for the purpose of describing the behavior of hardware, since hardware description languages like Verilog are also designed to be declarative.

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      There are a number of functional frontends for Verilog today already: Bluespec (Haskell), Hardcaml (OCaml), Chisel (Scala), etc.

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        Funny you should say that… https://github.com/janestreet/hardcaml

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        I’m glad to see people choose js_of_ocaml for running code in the browser. The effect of inlining on performance of bytecode trans-compiled to JS is rather counter-intuitive, maybe dune’s js_of_ocaml rules should take it into account by default.

        One thing I believe could be made clearer at cost of deviating from normal real-life code conventions is this:

        type t
        include Addressable_intf.S with type t := t

        It’s common to use MyModule.t for the module’s main type because most of the time it’s referred to by its fully-qualified name and something like Hashtbl.hashtbl is way too verbose compared to Hashtbl.t.

        However, with named types that example could be made almost self-explanatory:

        type ram_address
        include Addressable_intf.S with type address := ram_address