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      Suppose it costs $50,000,000 to design a chip and get into to production […] Alternatively, if you can sell 5,000,000 chips, then you could spend $500,000,000 on development, and still only have an engineering cost per chip of $100. It is easy to see that as a result of these economics, high volume designs achieve high performance with relative ease.

      …Obvious in from the economics but I’m not sure I’ve ever heard it laid out so well.

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      It’s interesting how the trade off has changed with owing fabs. A lot of armchair commentators laughed when AMD spun off their fabs, but it was a particularly astute move. The cost of developing each new process generation is higher than the previous one and so the economies of scale matter more. Intel fab customers know that their supplier is a competitor and Intel chips will always be highest priority and so it’s hard for them to sell fab capacity than it is for the likes of TSMC, who then get huge economies of scale from producing chips for many different designers.

      The benefits of co-designing the process and the core are lower because the process designers produce optimised cell libraries. Intel still has some advantages from being able to put custom analog electronics on their chips for power management but that is offset by not being able to move their designs to another process as easily and not being able to take advantage of competition in the fab space. Intel needs Intel’s fabs to be best. AMD, Qualcomm, Apple, and so on just need someone to be best and for those people to be willing to sell capacity to them.