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    Depressing as this is, it seriously underestimates the number of independent cores. A few years ago, someone pointed out to me that a Cortex M0 is about the same size as a pad (the blob of solder for connecting a wire to the chip). The CHERI microcontroller that we’re working on is about as big a 4KiB of SRAM. When cores are this small, it’s cheaper to solve a lot of problems by sticking a core and a few KiBs of SRAM on a chip and solve it in firmware than to build some dedicated logic.

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      ISTR a teardown of an SD card somewhere and the microscope view showed the whole thing was run by its own ARM microcontroller.

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        Oh for sure, a sea of addressable flash memory that you can read and write arbitrary bytes to is absolutely an abstraction presented by the computer onboard the sd card, which is doing a lot of work behind the scenes. Nowadays this often includes wear leveling.

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          I’d be pretty surprised if it’s a single one, though maybe that’s all you need for a cheap SD card. I know that WD’s interest in RISC-V comes from the fact that their SSDs used 7 Arm cores on the controller and in such a low-margin business the license fees ate a lot of their profits.

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        This USENIX talk https://www.youtube.com/watch?v=36myc8wQhLo talks about how Linux is too focused on the CPU, when there’s a ton of other processors running on a modern PC or server.

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          Too many.

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            The mention of Intel ME including a JVM got me curious, and following the links seems to lead to some kind of an incomplete archived copy of the relevant website – only the first two slides can be seen.