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    Now to port Genera to it?

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      I posted PreScheme link in page’s, comment section in case that helps author out. It was a C replacement used to build verified Scheme48. I figure eventually a LISPer in systems programming or embedded will find something about it useful for them, too. :)

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        Ooh nice! I hadn’t heard of this before!

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          Link here too might as well:

          https://en.wikipedia.org/wiki/PreScheme

          The papers are pretty detailed each covering interesting or useful things. A consistency of usefulness that’s rare in academia. ;) Another you might like to look up is Carp LISP which has Rust-like, memory safety instead of GC. IIRC that is.

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        Cool as that would be, there’s a major snag here. I haven’t looked at the uLisp implementation but the AVRs are a Harvard architecture. That is, they have two memory banks - one for program instructions and one for data. Projects like uLisp and the various forth interpreters targeting Arduinos are forced to forego compilation or JIT and any real hope of self-hosting ala Genera.

        I was looking at writing a lisp OS for my Arduino fleet a while back and came to the conclusion that you pretty much just wanted to use a different chip both for memory model and performance reasons.