Strange that there’s no mention or comparison to Xeon Phi.
I think this is more like an instruction set augmentation than a bulk processing accelerator.
https://communities.intel.com/community/itpeernetwork/datastack/blog/2014/06/18/disrupting-the-data-center-to-create-the-digital-services-economy
http://gigaom.com/2014/06/18/intel-will-offer-a-customizable-chip-to-keep-data-center-clients-happy/
I don’t really see this as anything much to do with ARM, more like a response to HSA.
Something like Halide could take great advantage of an FPGA down at reg/L1. It would kinda be like having your own microprogrammed AVX.
Strange that there’s no mention or comparison to Xeon Phi.
I think this is more like an instruction set augmentation than a bulk processing accelerator.
https://communities.intel.com/community/itpeernetwork/datastack/blog/2014/06/18/disrupting-the-data-center-to-create-the-digital-services-economy
http://gigaom.com/2014/06/18/intel-will-offer-a-customizable-chip-to-keep-data-center-clients-happy/
I don’t really see this as anything much to do with ARM, more like a response to HSA.
Something like Halide could take great advantage of an FPGA down at reg/L1. It would kinda be like having your own microprogrammed AVX.