Real computers have the hardware equivalent of “sleep 0.01; // dunno why but makes it work” everywhere in them.
I rarely venture outside CMOS (HC) families, but I’ve heard all sorts of fun stories about compatibility with older logic processes. I know of voltage margins and slew tolerances, but never thought of propagation delays needing to be slower to avoid breaking things.
Real computers have the hardware equivalent of “sleep 0.01; // dunno why but makes it work” everywhere in them.
I rarely venture outside CMOS (HC) families, but I’ve heard all sorts of fun stories about compatibility with older logic processes. I know of voltage margins and slew tolerances, but never thought of propagation delays needing to be slower to avoid breaking things.