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      There’s really a lot of severely misinformed opinion there. “Much of the hype of RISC-V is hoping for laptop/desktop/server class silicon.”

      Really? RISC-V is pitched mostly against the likes of ARM, which seems to be doing fine without laptop/desktop/server class silicon.

      Several RISC-V vendors are already shipping Cortex A53/A55 class CPUs, which are used as the LITTLE cores in mobile devices – and even still the main cores in lower end mobile. Several RISC-V vendors have formally announced A72 (SiFive U84) or A73 (Alibaba C910) class cores. Alibaba is apparently using these internally already, and boards for general sale are expected this year. SiFive’s U84 will probably be shipping in around 12 months from now.

      ARM is a few steps ahead with A75 and A76, but those are just incremental developments and RISC-V is catching up fast.

      It seems the article was written before the HiFive Unmatched was announced – but I don’t think it was written before the U74 CPU cores in the Unmatched were announced in October 2018, so I guess the author either wasn’t paying attention, or else don’t understand the standard 2 to 2.5 years from announcement of a core to shipping products using an SoC with that core. There is nothing surprising about the HiFive Unmatched.

      Was the article also written before Apple announced its switch to ARM64 architecture and their M1 chip?

      The M1 uses ARM’s 64 bit instruction set, but is far ahead of anything from ARM or its other licencees in performance.

      If someone made the same level of investment in a RISC-V core and SoC as in the M1 then that RISC-V product would perform basically the same as the M1. That’s a several billion dollar investment. Apple has that kind of money, but the best known RISC-V vendors such as SiFive (total funding to date under $200 million) don’t.

      That’s an economic problem to solve, not a problem with the RISC-V ISA.

      Alibaba or Huawei might well make that kind of investment in RISC-V. They are definitely both very interested in it.

      The article concludes with the same old links to uninformed people making uninformed criticisms of RISC-V. I don’t know who erincandescent is other than having written this rather famous post. Apparent the credibility of the post lies in them being an ARM engineer. Could be. ARM has thousands of engineers.

      Here’s the opinion of probably THE most important ARM engineer of the 1990s and 2000s, Dave Jaggar who developed the ARM7TDMI, Thumb, Thumb2.

      https://www.youtube.com/watch?v=_6sh097Dk5k

      Check at 51:30 where he says “I would Google RISC-V and find out all about it. They’ve done a fine instruction set, a fine job […] it’s the state of the art now for 32-bit general purpose instruction sets. And it’s got the 16-bit compressed stuff. So, yeah, learning about that, you’re learning from the best.”

      Incidentally, should that blog post really have multiple links into lobste.rs discussions?

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        https://www.youtube.com/watch?v=_6sh097Dk5k

        Check at 51:30 where he says “I would Google RISC-V and find out all about it.

        What makes it even more remarkable, is the question he was responding to: “what should I do to learn about modern 32-bit CPU design today?” He wasn’t even prompted to mention RISC-V.

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        ARM is a few steps ahead with A75 and A76, but those are just incremental developments and RISC-V is catching up fast

        That’s old news, relatively soon you’d have to catch up to Cortex-X1 / Neoverse V1.

        That’s an economic problem to solve, not a problem with the RISC-V ISA.

        Sure. Nobody said that the “ISA kinda sucks” and “ARM is far ahead in terms of ecosystem and momentum” criticisms are connected though. They’re just… both criticisms that exist.

        The article concludes with the same old links to uninformed people making uninformed criticisms of RISC-V. I don’t know who erincandescent is other than having written this rather famous post.

        How about responding to the actual points of the post rather than calling her “uninformed”?

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          How about responding to the actual points of the post rather than calling her “uninformed”?

          I’d also hesitate to call a former engineer at Arm “uninformed” too. Biased perhaps, but it would be hard not to be if you’ve worked for any org that makes CPUs, and certainly informed.

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            I’m a former engineer at Mozilla, Samsung R&D, and SiFive. I’ve done a ton of work with ARM ISA CPUs from ARM7TDMI and Cortex M0 to Apple M1. You’ll find my name in the “contributors” list in the RISC-V ISA Manual and in the draft specifications for the Vector and Bit Manipulation extensions. I’ve worked on compilers and emulators for both ISAs (and others).

            There are detailed technical rebuttals of erincandescent’s blog post but that doesn’t stop people linking to it all the time.

            That’s why I counter her opinion with the succinct opinion of a much more illustrious ARM engineer.

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        The original rant has wasted hundreds of hours and is an ill informed diversion. Even the title is arrogant, what does the author know about me or what I think of RISC-V.

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        If someone made the same level of investment in a RISC-V core and SoC as in the M1 then that RISC-V product would perform basically the same as the M1.

        So CPU performance is purely a function of money? It’s surprising that Intel hasn’t still got the market sewn up, then. 🤑

        Seriously, that sounds like an insult to Apple’s hardware engineering team.

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          Money is the tool with which an investment is realized.

          Apple’s hardware team is most of the investment. You can’t throw a few million dollars out a window and expect the M1 to appear on your doorstep.

          Intel got too used to being the top dog. They may be spending a lot, I’ve not looked to see, but that doesn’t mean they are investing the way they need to so as to stay on top.

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          It’s surprising that Intel hasn’t still got the market sewn up, then.

          I mean, they sort of did for a very long time.

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          Uhm, Apple built the recent CPU on TMSC’s 5nm process, where pundits talk about nine-digit price tags to get a CPU into production.

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          So CPU performance is purely a function of money?

          To a first approximation, yes. In fact, most forms of performance are a function of money; it’s why e.g. so much effort is expended in most forms of motor racing to prevent so-called “checkbook racing”.

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          “investment” doesn’t mean money. If Apple’s SoC team built a RISC-V ISA process on the same TSMC node one presumes the performance would be similar to M1.

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          You’ve also got to not make stupid mistakes such as P4 and Itanium, which let AMD get a good sniff with Athlon and then Athlon64/Opteron forcing Intel to adopt their instruction set. More recently Intel’s stupid mistake is firstly cruising micro-architecturally from Sandy Bridge to Skylake, and then since Skylake, and not being able to get chip factories working while TSMC and Samsung power ahead.

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      I’d say RISC-V is great for supply chain vulnerabilities. I have an ISA I can build into an FPGA so I know it’s what I expect, without any surprises.

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      My thoughts pretty much.

      It is interesting that SiFive has actually went relatively far into “Unix class” chips. But it’s still only Raspberry Pi class hardware, this is the “embedded but not that tiny embedded” space. The server market doesn’t really want yet another ISA. ARM is the one viable target for migrating from x86. It’s well established already, it’s on AWS, we’re done here.

      nationalist vanity CPUs (think Loongson; no one will run them but for show and perhaps a niche of radical ideologues)

      Usually the government itself would run them, especially the military, also various government contractors.

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        ARM themselves are only have a couple of incremental annual iterations past “Raspberry Pi class hardware”.

        RISC-V started off 25 years behind ARM and are maybe 5 to 6 years behind now, catching rapidly.

        Apple have taken the ARM 64 bit ISA far beyond what ARM have, but that’s of no importance to anyone except Apple and their customers. They could have just as easily done the same with PowerPC or RISC-V.

        Fujitsu are making an ARM64 based supercomputer. The European Processor Initiative are making a supercomputer with a mix of ARM64 and RISCV64.

        Amazon have ARM64 cloud servers. Alibaba have RISCV64 cloud servers.

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          They could have just as easily done the same with PowerPC or RISC-V.

          Apple had a great deal of design input into PowerPC and had to switch to intel because performance was ultimately not up to snuff. Given that easily observable history, you should cite some evidence if you think they could have done the same thing with PowerPC that they did with ARM. You should also put forth a theory as to why they didn’t if they could have… the price of the conversion to intel was significant, and it would have been quite irrational for Apple to absorb that if they could have taken PPC to the same place they’ve taken ARM.

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            It’s quite simple. The IBM PPC G5 had fine performance for the day – better than Pentium 4 – as did its successors, but IBM didn’t care about power consumption and Apple needed chips for laptops as well.

            Motorola’s PPC G4 (a term which covers a large range of microarchitectures running at 400 MHz to 1.42 GHz) was rather low power, but wasn’t very fast.

            Intel had pretty much the same problem with the Pentium 4 as Apple had with the G5. But then another Intel team in Israel went back to the Pentium Pro - Pentium III and were very successful in increasing the performance and also keeping the power consumption down. This was Centrino / Pentium M and later became Core.

            Apple in fact bought a company, PA Semi, which was designing PowerPC CPUs. However this happened three years after Apple had already switched from PowerPC to x86. No point in going back, so Apple set them to designing ARM-based cores and SoCs, which led to the A11, A12, A13 and now M1.

            I expect Apple with the PA Semi team could have done the same with PowerPC as they did with ARM64. But it was too late for the desktop, and I guess would have been too much of a incompatible break for iPhone.

            I don’t know whether Apple could have made PowerPC cores suitable for things like the Apple Watch or AirPods.

            One downside of PowerPC is pretty big code size. ARM have done a pretty good job on that with ARM64, coming in pretty much at parity with AMD64, which is very very good for a fixed-length 32 bit instruction set. But RISCV64 has much smaller code size than both – ARM unaccountably seems to have forgotten what it was about Thumb2 that made them rich.

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              I expect Apple with the PA Semi team could have done the same with PowerPC as they did with ARM64. But it was too late for the desktop, and I guess would have been too much of a incompatible break for iPhone.

              That’s very well-put. I’d love to see the alternate timeline that led them to build out PowerPC.

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            Is it possible that the powerpc chips were just not performant enough and Apple didn’t have the resources to do anything with them even if they could have?

            The Apple of late 2010s is different from the Apple of early 2000s.

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              Certainly. But if Apple didn’t have the expertise/resources to do so with PPC, then they gained that expertise and developed those resources by making chips for their phones and tablets. And those chips were ARM-based. There was no suitable PowerPC chip for them to start from, and the in house expertise they developed was full of experience with those ARM based chips.

              So my argument is that they could not just as easily have done the same with PowerPC or RISC-V. The opportunity that let them develop the resources wasn’t there with PPC and hasn’t been there yet for RISC-V.

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      Clean web design but, css doesn’t make an argument.