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    I found some parts of the article confusing —the Hardware Caches section shows cache lines with tags that have a mysterious number of bits and the Address Translation section has a diagram that is mismatched with the text.

    It turns out that the diagrams come from a Wikipedia article that uses simplified sizes (e.g., cache line = 4 bytes) whereas the Algorithmica text uses realistic sizes (e.g., cache line = 64 bytes).

    Wikipedia has worked examples for the three placement policies, so it might be helpful to read as well if you want to go deeper.